During the manufacture of semiconductor devices and integrated circuits, silicon wafers are iteratively processed through a series of deposition and etching steps to form overlying material layers and device structures. A polishing technique known as chemical mechanical planarization (CMP) may be used to remove surface irregularities (such as bumps, areas of unequal elevation, troughs, and trenches) remaining after the deposition and etching steps, with the objective of obtaining a smooth wafer surface without scratches or depressions (known as dishing), with high uniformity across the wafer surface.
In a typical CMP polishing process, a substrate such as a wafer is pressed against and relatively moved with respect to a polishing pad in the presence of a working liquid that is typically a slurry of abrasive particles in water and/or an etching chemistry. Various CMP polishing pads for use with abrasive slurries have been disclosed, for example, U.S. Pat. Nos. 5,257,478; 5,921,855; 6,126,532; 6,899,598 B2; and 7,267,610. Fixed abrasive polishing pads are also known, as exemplified by U.S. Pat. No. 6,908,366 B2, in which the abrasive particles are generally fixed to the surface of the pad, often in the form of precisely shaped abrasive composites extending from the pad surface. Recently, a polishing pad having a multiplicity of polishing elements extending from a compressible underlayer and affixed to the underlayer by a guide plate was described in PCT International Pub. No. WO 2006/057714. Although a wide variety of polishing pads are known and used, the art continues to seek new and improved polishing pads for CMP, particularly in CMP processes where larger die diameters are being used, or where higher levels of wafer surface flatness and polishing uniformity are required.